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 RD15LD74AP, RD15LD74ANP, RD15LD74AT
8-bit D-type Flip-Flop Driver (with Clear)
REJ03D0894-0300 Rev.3.00 Feb 29, 2008
Description
RD15LD74AP, RD15LD74ANP, RD15LD74AT have eight D-type flip-flop drivers and high voltage NMOS output (open drain output) in a 20 pin package. Each bit, there are a common clear and clock input. The input signal is output with the rising edge of clock signals. The voltage of maximum 15 V can be impressed to the drain-source voltage.
Features
* * * * * * * * Application of amusement equipment. Output voltage : VDS (max) = 15 V Output current : IDS (max) = 200 mA (par pin) Supply voltage range : 3.0 to 5.5 V Operating temperature range : -20 to +85 C Quiescent supply current : 5 A max. Low input current : 1 A max. Ordering Information
Part Name RD15LD74APT0 RD15LD74ANPT0 RD15LD74ATH0 Note: Package Type SDIP-20 pin DILP-20 pin TSSOP-20 pin Package Code (Previous Code) PRDP0020BA-A (20P4B) PRDP0020AC-B (DP-20NEV) PTSP0020JB-A (TTP-20DAV) Package Abbreviation P P T Packing Abbreviation (Quantity) T (1,125 pcs/box) T (1,000 pcs/box) H (2,000 pcs/reel) Surface Treatment 0 (Sn-Cu) 0 (Ni/Pd/Au) 0 (Ni/Pd/Au)
Please consult the sales office for the above package availability.
Pin Arrangement
CLR 1 D0 2 D1 3 D2 4 D3 5 D4 6 D5 7 D6 8 D7 9 CLK 10 (Top view) 20 VCC 19 Y0 18 Y1 17 Y2 16 Y3 15 Y4 14 Y5 13 Y6 12 Y7 11 GND
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 1 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT
Logic Diagram
Y0 19 Y1 18 Y2 17 Y3 16 Y4 15 Y5 14 Y6 13 Y7 12 VCC 20 10 CLK D CK R CLR 1 2 D0 D1 3 D2 4 D3 5 D4 6 D5 7 D6 8 D7 9 11 Q D CK R Q D CK R Q D CK R Q D CK R Q D CK R Q D CK R Q D CK R Q
GND
Note: Schmitt trigger circuit is added to all input. VH = 1.5 V (TYP)
Function Table
CLR L H H H H Inputs CLK X L D X L H X X Output Y Z Z L Y0 Y0
H : High level L : Low level X : Immaterial Z : High Impedance : Low to High transition : High to Low transition Y0 : Level of Y before the indicated steady input conditions were established.
Timing Figure
VCC CLK GND VCC D GND VCC CLR GND VOH Y VOL
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 2 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT
Absolute Maximum Ratings
Item Supply voltage Input voltage Output voltage Output current Maximum power *1 dissipation Storage temperature Note: Symbol VCC VI VDS IDS PT Tstg Ratings 6.5 -0.5 to VCC -0.5 to 15 200 1.47 1.38 0.76 -55 to +125 Unit V V V mA W C Conditions
Output : "Z" (off) Output : "on" , Current of one circuit SDIP Ta = 25C DILP Base implementation TSSOP
The absolute maximum ratings are values which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The maximum package power dissipation was calculated using a junction temperature of 150C
Recommended Operating Conditions
Item Supply voltage Input voltage Output voltage Output current (Current of an one circuit, when eight circuit operation) Input rise / fall time Operating temperature Note: Symbol VCC VI VDS Ratings 3.0 0 0 0 0 0 0 0 0 0 -20 5.5 VCC 15 200 150 200 140 200 105 500 85 Unit V V V mA mA mA ns C Conditions
Output "Z" (off) SDIP DILP TSSOP Duty cycle 60% Duty cycle 100% Duty cycle 55% Duty cycle 100% Duty cycle 25% Duty cycle 100%
IDS
tr, tf Ta
VCC = 3.0 V, 4.5 V
Unused or floating inputs must be held high or low.
Electrical Characteristics
(Ta = -20 to +85C)
Item Symbol VIH Input voltage VIL VCC (V) 3.0 to 3.6 4.5 to 5.5 3.0 to 3.6 4.5 to 5.5 3.0 to 3.6 4.5 to 5.5 3.0 to 3.6 4.5 to 5.5 3.0 to 5.5 3.0 to 5.5 5.5 5.5 IDS RDS 5.0 4.5 Ratings Min VCCx0.84 VCCx0.76 -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- 0.30 0.25 0.60 0.51 0.005 0.005 0.005 0.005 0.002 2.5 Max -- -- VCCx0.16 VCCx0.24 0.45 0.38 0.90 0.77 1.0 -1.0 5.0 5.0 5.0 3.8 A Unit V V IDS = 100 mA V IDS = 200 mA A A A VI = VCC VI = 0 V All output "Z" (off) VI = VCC or GND All output "on", VI = VCC or GND VDS = 12 V IDS = 100 mA Conditions
Output voltage
VDS
"H" input current "L" input current Quiescent supply current Output off state leak current Output on resister
IIH IIL ICC
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 3 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT
Switching Characteristics
(Ta = -20 to +85C, CL = 30 pF, tr = tf =6 ns )
Item Maximum clock frequency Propagation delay time Propagation delay time Setup time Hold time Pulse width Output rise time Output fall time Symbol fmax tPLH tPHL tsu th tW tTLH tTHL VCC (V) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 Ratings Min -- -- 1.0 1.0 1.0 1.0 25 20 3 3 50 40 -- -- -- -- Max 15 20 65 50 60 45 -- -- -- -- -- -- 30 20 10 5 Unit MHz ns ns ns ns ns ns ns CLK, CLR to Y CLK to Y D to CLK CLK to D CLK, CLR Y Y Conditions
Test Circuit
VCC Input VT = 12V
VCC
See Function Table
Palse generator Zout = 50
CLK D CLR GND Y
RL = 120
Output
Input Palse generator Zout = 50
CL = 30 pF
Note: 1. Input waveform : PRR = 1MHz, Duty Cycle = 50%, tr = 6ns, tf = 6ns 2. CL includes probe and jig capacitance.
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 4 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT
Waveforms
* Waveforms - 1
tr
90 % 90 % 50 % 10 % 50 %
tf VCC GND th
Data Input (D0 to D7)
10 %
50 %
t su tr
th tf
90 %
t su
VCC
50 % 10 %
Clock Input (CLK)
10 %
50 %
GND t PLH
90 %
t PHL
90 % 50 % 10 %
VOH VOL
Output (Y0 to Y7)
50 % 10 %
t THL
t TLH tf 90 % 50 % 10 % t PLH VCC GND
* Waveforms - 2
Clear Input (CLR)
Output (Y0 to Y7)
90 % 50 % 10 % t TLH
VOH VOL
* Waveforms - 3
tr
90 % 50 % 10 % 90 % 50 % 10 %
tf VCC GND
High Level Pulse
tw All Input
90 %
tw
90 % 50 % 10 % 50 % 10 %
VCC
Low Level Pulse
GND tr
tf
Notes: 1. Input waveform : PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns 2. The input and output is measured one at a time with one transition per measurement.
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 5 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT Application Data
Duty Cycle - Output Current Characteristics * RD15LD74AP
200 180 160
Duty Cycle - Output Current Characteristics * RD15LD74AP
Ta=25C
1~8
200 180 160
Ta=85C
1~5 6 7 8
Output Current IDS (mA)
140 120 100 80 60 40 20 0 0 10 20 30 40 50 60 70 80 90 100
* Output current values represent the current per circuit. * Repeated frequency 10Hz * The value the circle represents the value of the simultaneously - operated circuit.
Output Current IDS (mA)
140 120 100 80 60 40 20 0 0 10 20 30 40 50 60 70 80 90 100
* Output current values represent the current per circuit. * Repeated frequency 10Hz * The value the circle represents the value of the simultaneously - operated circuit.
Duty Cycle (%)
Duty Cycle (%)
Duty Cycle - Output Current Characteristics * RD15LD74ANP
200 180 160
Duty Cycle - Output Current Characteristics * RD15LD74ANP Ta=85C
Ta=25C
1~8
200 180 160
1~4 5 6 7 8
Output Current IDS (mA)
140 120 100 80 60 40 20 0 0 10 20 30 40 50 60 70 80 90 100
* Output current values represent the current per circuit. * Repeated frequency 10Hz * The value the circle represents the value of the simultaneously - operated circuit.
Output Current IDS (mA)
140 120 100 80 60 40 20 0 0 10 20 30 40 50 60 70 80 90 100
* Output current values represent the current per circuit. * Repeated frequency 10Hz * The value the circle represents the value of the simultaneously - operated circuit.
Duty Cycle (%)
Duty Cycle (%)
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 6 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT Application Data
Duty Cycle - Output Current Characteristics * RD15LD74AT
200 180
Duty Cycle - Output Current Characteristics * RD15LD74AT
Ta=25C
1~5 6 7 8
200 180
Ta=85C
1~2 3 4 5 6 7 8
Output Current IDS (mA)
Output Current IDS (mA)
160 140 120 100 80 60 40 20 0 0
* Output current values represent the current per circuit. * Repeated frequency 10Hz * The value the circle represents the value of the simultaneously - operated circuit.
160 140 120 100 80 60 40 20 0 0
* Output current values represent the current per circuit. * Repeated frequency 10Hz * The value the circle represents the value of the simultaneously - operated circuit.
10 20 30 40 50 60 70 80 90 100
10 20 30 40 50 60 70 80 90 100
Duty Cycle (%)
Duty Cycle (%)
Switching Time - Ambient Temperature Characteristics VCC=5.0V, VT=12V, CL=30pF, RL=120
50.0
Switching Time - Output Current Characteristics VCC=5.0V, VT=12V, Ta=25C
1000.0
40.0
tPLH(CLR to Y)
100.0
Switching Time (ns)
tPLH(CLK to Y) tPHL(CLK to Y)
Switching Time (ns)
30.0
tPLH(CLR to Y) tPLH(CLK to Y) tPHL(CLK to Y)
20.0
tTLH
10.0
tTLH
10.0
tTHL
tTHL
0.0 -40 -20 0 20 40 60 80 100
1.0 10 100 1000
Ambient Temperature Ta (C)
Output Current IDS (mA)
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 7 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT
Package Dimensions
JEITA Package Code P-SDIP20-6.3x19-1.78 RENESAS Code PRDP0020BA-A Previous Code 20P4B MASS[Typ.] 1.0g
20
11
1
10
c
*1
e1
E
*2
D
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
A
A2
Reference Dimension in Millimeters Symbol
e SEATING PLANE
*3 b 3
bp
e1 D E A A1 A2 bp b3 c e L
Min Nom Max 7.32 7.62 7.92 18.8 19.0 19.2 6.15 6.3 6.45 4.5 0.51 3.3 0.38 0.48 0.58 0.9 1.0 1.3 0.22 0.27 0.34 0 15 1.528 1.778 2.028 3.0
JEITA Package Code P-DIP20-6.3x24.5-2.54
L
RENESAS Code PRDP0020AC-B
Previous Code DP-20NEV
MASS[Typ.] 1.26g
D
20
11
A1
1 0.89 b3
10
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 24.50 25.40 6.30 7.00 5.08
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.27 2.54
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 8 of 9
RD15LD74AP, RD15LD74ANP, RD15LD74AT
JEITA Package Code P-TSSOP20-4.4x6.5-0.65 RENESAS Code PTSP0020JB-A Previous Code TTP-20DAV MASS[Typ.] 0.07g
*1
D F 11
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
*2
E
Index mark
Terminal cross section ( Ni/Pd/Au plating )
Reference Dimension in Millimeters Symbol
c
1 Z e
*3
10 bp L1 x M
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 6.50 6.80 4.40
0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0 8 6.20 6.40 6.60 0.65 0.13 0.10 0.65 0.4 0.5 0.6 1.0
REJ03D0894-0300 Rev.3.00 Feb 29, 2008 Page 9 of 9
A
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. 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Colophon .7.2


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